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Random access memory Writing Hardware Mutual Information Analysis MIA Circuit faults Process variation Tunneling magnetoresistance Differential power analysis DPA Protocols Routing Switches Countermeasures Defect modeling Loop PUF Machine learning OCaml Field Programmable Gates Array FPGA SoC Lightweight cryptography Linearity Image processing Fault injection Simulation Side-channel attack CPA Side-channel attacks SCA RSA Computational modeling Security services ASIC Dynamic range Electromagnetic Signal processing algorithms Reliability Information leakage Differential Power Analysis DPA Fault injection attack Magnetic tunneling Field programmable gate arrays Side-Channel Analysis Magnetic tunnel junction Transistors MRAM Coq Cryptography Countermeasure Voltage Intrusion detection Formal methods Sensors Temperature sensors Convolution Costs FPGA Neural networks STT-MRAM Variance-based Power Attack VPA Receivers Resistance Power demand Randomness Energy consumption Filtering Logic gates Estimation Authentication GSM Robustness Security Hardware security Confusion coefficient Masking countermeasure Internet of Things 3G mobile communication Side-channel attacks Sécurité SCA Side-Channel Analysis SCA TRNG Steadiness Reverse engineering Security and privacy Side-channel analysis Masking Side-Channel Attacks Power-constant logic AES Application-specific VLSI designs CRT Dual-rail with Precharge Logic DPL Aging Asynchronous Training PUF Reverse-engineering Formal proof Elliptic curve cryptography DRAM FDSOI Spin transfer torque

 

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428

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39 %

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