Task Decomposition Exploration of Applications with Large-Scale Data Processing on FPGA-Based NoC

Abstract : As the key interconnection technique of System on Chip (SoC), Network on Chip (NoC) architecture is widely used in the high-throughput and low latency system design, such as supercomputers and data mining. In addition to the bandwidth and latency, managing congestion resulted from imbalance network load is critical to improve the system performance. The scaling of FPGA technology make it true that tasks of one application with large-scale data processing can be decomposed into subtasks to balance the workload and then alleviate the network congestion. In this paper, one task decomposing exploration method on FPGA-based NoC is presented. According to different parallel properties of tasks of the application, subtask graphs are generated by taking advantage of different decomposition strategies. These subtask graphs are evaluated in timing latency and energy consumption based on FPGA-based NoC emulation platform. The experiments demonstrate that the task decomposition method of one specific application should be explored on FPGA platform. It cannot only rely on the experiences of the designer. The most appropriate task decomposition scheme for one specific application strongly depends on the selected decomposition strategies based on properties of the application. On the grounds of the experimental results obtained and the FPGA resources utilization, the designer can select the appropriate task decomposition scheme in a short exploration time and with precise timing evaluation.
Type de document :
Communication dans un congrès
International Conference on Computer, Electronics and Communication Engineering , Jun 2017, Sanya, China. 〈http://www.cece2017.org/〉
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https://hal-auf.archives-ouvertes.fr/hal-01563845
Contributeur : Virginie Fresse <>
Soumis le : mardi 18 juillet 2017 - 10:55:09
Dernière modification le : jeudi 11 janvier 2018 - 06:20:36

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  • HAL Id : hal-01563845, version 1

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Ke Pang, Virginie Fresse, Sunying Yao. Task Decomposition Exploration of Applications with Large-Scale Data Processing on FPGA-Based NoC. International Conference on Computer, Electronics and Communication Engineering , Jun 2017, Sanya, China. 〈http://www.cece2017.org/〉. 〈hal-01563845〉

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